• Documentation


• NMRC Deliverables

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The 32/64-bit NeuroMatrix® RISC Core (NMRC) was designed as a powerful engine, that can work as alone as in cooperation with 32- or 64-bit co-processor (DSP co-processor for example). It allows easy way to build variety of high-performance application specific processors.

Features:

• original RC "Module" RISC architecture;
• 32- and(or) 64-bit data paths;
• advanced Harvard architecture;
• extended architecture for 32- or 64-bit co-processor;
• 16-Gbyte address space;
• dual-channel DMA controller;
• two address generators support up to two memory accesses per cycle;
• five-stage pipeline;
• 10 bypass paths to minimize the effect of pipeline latency on dependent operations;
• 32-bit VLIW instruction;
• up to three operations per instruction;
• load-store architecture;
• easy to add new instructions;
• easy to add 32x32 bit array multiplier;
• strong SDK and Evaluation Boards.

Specification:

• Gate count: 45K eq. gates*
• Dimension: 3200 um x 1600 um*
• Power: 200 mW @ 150 MHz @ 2,5V*

*at 0.25 um CMOS standard cell technology without on-chip memory and I/O
buffers.

Documentation

NMRC Deliverables

Design Database

• Synthesizable RTL Verilog source code model of NMRC core
• Install script
• Synopsys DC synthesizer scripts

NMRC software development tools

• Professional NMRC SDK
• NMRC SDK. Programmer's guide
• NMRC assembly language overview
• NMRC SDK. Load and exchange library
• Application notes with source code examples

Test Suite

• Verilog Behavioral (non-synthesizeable) description which describes test-bench environment and generates the test stimulus to external NMRC interfaces (main NMRC interfaces, interrupts etc.)
• Test bench for running a compiled/assembled test program from the linker output file format
• Exhaustive test program/vectors - runs all instructions and all modes

Documentation

• A flyer, summarizing the key features of the NMRC core
• Technical data sheet, summarizing interfaces, features and performance
• Design documentation including block diagrams
• Functional specification for all external interfaces
• Documentation of the synthesis scripts
• Documentation of debug / test / emulation features

Module® and NeuroMatrix® are registered
trademarks of Research Center "Module".
All other trademarks are the exclusive property
of their respective owners.